cpuid: github.com/klauspost/cpuid Index | Examples | Files | Directories

package cpuid

import "github.com/klauspost/cpuid"

Package cpuid provides information about the CPU running the current program.

CPU features are detected on startup, and kept for fast access through the life of the application. Currently x86 / x64 (AMD64) is supported.

You can access the CPU information by accessing the shared CPU variable of the cpuid library.

Package home: https://github.com/klauspost/cpuid


// Print basic CPU information:
fmt.Println("Name:", CPU.BrandName)
fmt.Println("PhysicalCores:", CPU.PhysicalCores)
fmt.Println("ThreadsPerCore:", CPU.ThreadsPerCore)
fmt.Println("LogicalCores:", CPU.LogicalCores)
fmt.Println("Family", CPU.Family, "Model:", CPU.Model)
fmt.Println("Features:", CPU.Features)
fmt.Println("Cacheline bytes:", CPU.CacheLine)

// Test if we have a specific feature:
if CPU.SSE() {
    fmt.Println("We have Streaming SIMD Extensions")



Package Files

cpuid.go detect_intel.go generate.go


const (
    CMOV        = 1 << iota // i686 CMOV
    NX                      // NX (No-Execute) bit
    AMD3DNOW                // AMD 3DNOW
    AMD3DNOWEXT             // AMD 3DNowExt
    MMX                     // standard MMX
    MMXEXT                  // SSE integer functions or AMD MMX ext
    SSE                     // SSE functions
    SSE2                    // P4 SSE functions
    SSE3                    // Prescott SSE3 functions
    SSSE3                   // Conroe SSSE3 functions
    SSE4                    // Penryn SSE4.1 functions
    SSE4A                   // AMD Barcelona microarchitecture SSE4a instructions
    SSE42                   // Nehalem SSE4.2 functions
    AVX                     // AVX functions
    AVX2                    // AVX2 functions
    FMA3                    // Intel FMA 3
    FMA4                    // Bulldozer FMA4 functions
    XOP                     // Bulldozer XOP functions
    F16C                    // Half-precision floating-point conversion
    BMI1                    // Bit Manipulation Instruction Set 1
    BMI2                    // Bit Manipulation Instruction Set 2
    TBM                     // AMD Trailing Bit Manipulation
    LZCNT                   // LZCNT instruction
    POPCNT                  // POPCNT instruction
    AESNI                   // Advanced Encryption Standard New Instructions
    CLMUL                   // Carry-less Multiplication
    HTT                     // Hyperthreading (enabled)
    HLE                     // Hardware Lock Elision
    RTM                     // Restricted Transactional Memory
    RDRAND                  // RDRAND instruction is available
    RDSEED                  // RDSEED instruction is available
    ADX                     // Intel ADX (Multi-Precision Add-Carry Instruction Extensions)
    SHA                     // Intel SHA Extensions
    AVX512F                 // AVX-512 Foundation
    AVX512DQ                // AVX-512 Doubleword and Quadword Instructions
    AVX512IFMA              // AVX-512 Integer Fused Multiply-Add Instructions
    AVX512PF                // AVX-512 Prefetch Instructions
    AVX512ER                // AVX-512 Exponential and Reciprocal Instructions
    AVX512CD                // AVX-512 Conflict Detection Instructions
    AVX512BW                // AVX-512 Byte and Word Instructions
    AVX512VL                // AVX-512 Vector Length Extensions
    AVX512VBMI              // AVX-512 Vector Bit Manipulation Instructions
    MPX                     // Intel MPX (Memory Protection Extensions)
    ERMS                    // Enhanced REP MOVSB/STOSB
    RDTSCP                  // RDTSCP Instruction
    CX16                    // CMPXCHG16B Instruction
    SGX                     // Software Guard Extensions
    IBPB                    // Indirect Branch Restricted Speculation (IBRS) and Indirect Branch Predictor Barrier (IBPB)
    STIBP                   // Single Thread Indirect Branch Predictors

    // Performance indicators
    SSE2SLOW // SSE2 is supported, but usually not faster
    SSE3SLOW // SSE3 is supported, but usually not faster
    ATOM     // Atom processor, some SSSE3 instructions are slower

func Detect Uses

func Detect()

Detect will re-detect current CPU info. This will replace the content of the exported CPU variable.

Unless you expect the CPU to change while you are running your program you should not need to call this function. If you call this, you must ensure that no other goroutine is accessing the exported CPU variable.

type CPUInfo Uses

type CPUInfo struct {
    BrandName      string // Brand name reported by the CPU
    VendorID       Vendor // Comparable CPU vendor ID
    Features       Flags  // Features of the CPU
    PhysicalCores  int    // Number of physical processor cores in your CPU. Will be 0 if undetectable.
    ThreadsPerCore int    // Number of threads per physical core. Will be 1 if undetectable.
    LogicalCores   int    // Number of physical cores times threads that can run on each core through the use of hyperthreading. Will be 0 if undetectable.
    Family         int    // CPU family number
    Model          int    // CPU model number
    CacheLine      int    // Cache line size in bytes. Will be 0 if undetectable.
    Cache          struct {
        L1I int // L1 Instruction Cache (per core or shared). Will be -1 if undetected
        L1D int // L1 Data Cache (per core or shared). Will be -1 if undetected
        L2  int // L2 Cache (per core or shared). Will be -1 if undetected
        L3  int // L3 Instruction Cache (per core or shared). Will be -1 if undetected
    SGX SGXSupport
    // contains filtered or unexported fields

CPUInfo contains information about the detected system CPU.

var CPU CPUInfo

CPU contains information about the CPU as detected on startup, or when Detect last was called.

Use this as the primary entry point to you data, this way queries are

func (CPUInfo) ADX Uses

func (c CPUInfo) ADX() bool

ADX indicates support of Intel ADX (Multi-Precision Add-Carry Instruction Extensions)

func (CPUInfo) AMD Uses

func (c CPUInfo) AMD() bool

AMD returns true if vendor is recognized as AMD

func (CPUInfo) AVX Uses

func (c CPUInfo) AVX() bool

AVX indicates support of AVX instructions and operating system support of AVX instructions

func (CPUInfo) AVX2 Uses

func (c CPUInfo) AVX2() bool

AVX2 indicates support of AVX2 instructions

func (CPUInfo) AVX512BW Uses

func (c CPUInfo) AVX512BW() bool

AVX512BW indicates support of AVX-512 Byte and Word Instructions

func (CPUInfo) AVX512CD Uses

func (c CPUInfo) AVX512CD() bool

AVX512CD indicates support of AVX-512 Conflict Detection Instructions

func (CPUInfo) AVX512DQ Uses

func (c CPUInfo) AVX512DQ() bool

AVX512DQ indicates support of AVX-512 Doubleword and Quadword Instructions

func (CPUInfo) AVX512ER Uses

func (c CPUInfo) AVX512ER() bool

AVX512ER indicates support of AVX-512 Exponential and Reciprocal Instructions

func (CPUInfo) AVX512F Uses

func (c CPUInfo) AVX512F() bool

AVX512F indicates support of AVX-512 Foundation

func (CPUInfo) AVX512IFMA Uses

func (c CPUInfo) AVX512IFMA() bool

AVX512IFMA indicates support of AVX-512 Integer Fused Multiply-Add Instructions

func (CPUInfo) AVX512PF Uses

func (c CPUInfo) AVX512PF() bool

AVX512PF indicates support of AVX-512 Prefetch Instructions

func (CPUInfo) AVX512VBMI Uses

func (c CPUInfo) AVX512VBMI() bool

AVX512VBMI indicates support of AVX-512 Vector Bit Manipulation Instructions

func (CPUInfo) AVX512VL Uses

func (c CPUInfo) AVX512VL() bool

AVX512VL indicates support of AVX-512 Vector Length Extensions

func (CPUInfo) AesNi Uses

func (c CPUInfo) AesNi() bool

AesNi indicates support of AES-NI instructions (Advanced Encryption Standard New Instructions)

func (CPUInfo) Amd3dnow Uses

func (c CPUInfo) Amd3dnow() bool

Amd3dnow indicates support of AMD 3DNOW! instructions

func (CPUInfo) Amd3dnowExt Uses

func (c CPUInfo) Amd3dnowExt() bool

Amd3dnowExt indicates support of AMD 3DNOW! Extended instructions

func (CPUInfo) Atom Uses

func (c CPUInfo) Atom() bool

Atom indicates an Atom processor

func (CPUInfo) BMI1 Uses

func (c CPUInfo) BMI1() bool

BMI1 indicates support of BMI1 instructions

func (CPUInfo) BMI2 Uses

func (c CPUInfo) BMI2() bool

BMI2 indicates support of BMI2 instructions

func (CPUInfo) CX16 Uses

func (c CPUInfo) CX16() bool

CX16 indicates if CMPXCHG16B instruction is available.

func (CPUInfo) Clmul Uses

func (c CPUInfo) Clmul() bool

Clmul indicates support of CLMUL instructions (Carry-less Multiplication)

func (CPUInfo) Cmov Uses

func (c CPUInfo) Cmov() bool

Cmov indicates support of CMOV instructions

func (CPUInfo) ERMS Uses

func (c CPUInfo) ERMS() bool

ERMS indicates support of Enhanced REP MOVSB/STOSB

func (CPUInfo) F16C Uses

func (c CPUInfo) F16C() bool

F16C indicates support of F16C instructions

func (CPUInfo) FMA3 Uses

func (c CPUInfo) FMA3() bool

FMA3 indicates support of FMA3 instructions

func (CPUInfo) FMA4 Uses

func (c CPUInfo) FMA4() bool

FMA4 indicates support of FMA4 instructions

func (CPUInfo) HLE Uses

func (c CPUInfo) HLE() bool

HLE indicates support of Hardware Lock Elision

func (CPUInfo) HTT Uses

func (c CPUInfo) HTT() bool

HTT indicates the processor has Hyperthreading enabled

func (CPUInfo) Ia32TscAux Uses

func (c CPUInfo) Ia32TscAux() uint32

Ia32TscAux returns the IA32_TSC_AUX part of the RDTSCP. This variable is OS dependent, but on Linux contains information about the current cpu/core the code is running on. If the RDTSCP instruction isn't supported on the CPU, the value 0 is returned.

This example will calculate the chip/core number on Linux Linux encodes numa id (<<12) and core id (8bit) into TSC_AUX.


ecx := CPU.Ia32TscAux()
if ecx == 0 {
    fmt.Println("Unknown CPU ID")
chip := (ecx & 0xFFF000) >> 12
core := ecx & 0xFFF
fmt.Println("Chip, Core:", chip, core)

func (CPUInfo) Intel Uses

func (c CPUInfo) Intel() bool

Intel returns true if vendor is recognized as Intel

func (CPUInfo) LogicalCPU Uses

func (c CPUInfo) LogicalCPU() int

LogicalCPU will return the Logical CPU the code is currently executing on. This is likely to change when the OS re-schedules the running thread to another CPU. If the current core cannot be detected, -1 will be returned.

func (CPUInfo) Lzcnt Uses

func (c CPUInfo) Lzcnt() bool

Lzcnt indicates support of LZCNT instruction

func (CPUInfo) MMX Uses

func (c CPUInfo) MMX() bool

MMX indicates support of MMX instructions

func (CPUInfo) MMXExt Uses

func (c CPUInfo) MMXExt() bool

MMXExt indicates support of MMXEXT instructions (SSE integer functions or AMD MMX ext)

func (CPUInfo) MPX Uses

func (c CPUInfo) MPX() bool

MPX indicates support of Intel MPX (Memory Protection Extensions)

func (CPUInfo) NSC Uses

func (c CPUInfo) NSC() bool

NSC returns true if vendor is recognized as National Semiconductor

func (CPUInfo) NX Uses

func (c CPUInfo) NX() bool

NX indicates support of NX (No-Execute) bit

func (CPUInfo) Popcnt Uses

func (c CPUInfo) Popcnt() bool

Popcnt indicates support of POPCNT instruction

func (CPUInfo) RDTSCP Uses

func (c CPUInfo) RDTSCP() bool

RDTSCP Instruction is available.

func (CPUInfo) RTCounter Uses

func (c CPUInfo) RTCounter() uint64

RTCounter returns the 64-bit time-stamp counter Uses the RDTSCP instruction. The value 0 is returned if the CPU does not support the instruction.

func (CPUInfo) RTM Uses

func (c CPUInfo) RTM() bool

RTM indicates support of Restricted Transactional Memory

func (CPUInfo) Rdrand Uses

func (c CPUInfo) Rdrand() bool

Rdrand indicates support of RDRAND instruction is available

func (CPUInfo) Rdseed Uses

func (c CPUInfo) Rdseed() bool

Rdseed indicates support of RDSEED instruction is available

func (CPUInfo) SHA Uses

func (c CPUInfo) SHA() bool

SHA indicates support of Intel SHA Extensions

func (CPUInfo) SSE Uses

func (c CPUInfo) SSE() bool

SSE indicates support of SSE instructions

func (CPUInfo) SSE2 Uses

func (c CPUInfo) SSE2() bool

SSE2 indicates support of SSE 2 instructions

func (CPUInfo) SSE2Slow Uses

func (c CPUInfo) SSE2Slow() bool

SSE2Slow indicates that SSE2 may be slow on this processor

func (CPUInfo) SSE3 Uses

func (c CPUInfo) SSE3() bool

SSE3 indicates support of SSE 3 instructions

func (CPUInfo) SSE3Slow Uses

func (c CPUInfo) SSE3Slow() bool

SSE3Slow indicates that SSE3 may be slow on this processor

func (CPUInfo) SSE4 Uses

func (c CPUInfo) SSE4() bool

SSE4 indicates support of SSE 4 (also called SSE 4.1) instructions

func (CPUInfo) SSE42 Uses

func (c CPUInfo) SSE42() bool

SSE42 indicates support of SSE4.2 instructions

func (CPUInfo) SSE4A Uses

func (c CPUInfo) SSE4A() bool

SSE4A indicates support of AMD Barcelona microarchitecture SSE4a instructions

func (CPUInfo) SSSE3 Uses

func (c CPUInfo) SSSE3() bool

SSSE3 indicates support of SSSE 3 instructions

func (CPUInfo) TBM Uses

func (c CPUInfo) TBM() bool

TBM indicates support of TBM instructions (AMD Trailing Bit Manipulation)

func (CPUInfo) TSX Uses

func (c CPUInfo) TSX() bool

TSX is split into HLE (Hardware Lock Elision) and RTM (Restricted Transactional Memory) detection. So TSX simply checks that.

func (CPUInfo) Transmeta Uses

func (c CPUInfo) Transmeta() bool

Transmeta returns true if vendor is recognized as Transmeta

func (CPUInfo) VIA Uses

func (c CPUInfo) VIA() bool

VIA returns true if vendor is recognized as VIA

func (CPUInfo) VM Uses

func (c CPUInfo) VM() bool

VM Will return true if the cpu id indicates we are in a virtual machine. This is only a hint, and will very likely have many false negatives.

func (CPUInfo) XOP Uses

func (c CPUInfo) XOP() bool

XOP indicates support of XOP instructions

type Flags Uses

type Flags uint64

Flags contains detected cpu features and caracteristics

func (Flags) String Uses

func (f Flags) String() string

String returns a string representation of the detected CPU features.

func (Flags) Strings Uses

func (f Flags) Strings() []string

Strings returns and array of the detected features.

type SGXSupport Uses

type SGXSupport struct {
    Available           bool
    SGX1Supported       bool
    SGX2Supported       bool
    MaxEnclaveSizeNot64 int64
    MaxEnclaveSize64    int64

type Vendor Uses

type Vendor int

Vendor is a representation of a CPU vendor.

const (
    Other Vendor = iota
    KVM  // Kernel-based Virtual Machine
    MSVM // Microsoft Hyper-V or Windows Virtual PC



Package cpuid imports 1 packages (graph) and is imported by 38 packages. Updated 2019-01-12. Refresh now. Tools for package owners.