amd64: github.com/modern-go/amd64 Index | Files | Directories

package amd64

import "github.com/modern-go/amd64"

Index

Package Files

assembler.go cpuid.go cpuid_amd64.go dump.go encoding.go instruction.go instructions.go modrm.go operand.go operands.go prefix.go

Constants

const (
    ModeIndir       = 0x0
    ModeIndirDisp8  = 0x1
    ModeIndirDisp32 = 0x2
    ModeReg         = 0x3
)
const PageSize = 4096
const Prefix16Bit = 0x66

If a 66H override is used with REX and REX.W = 0, the operand size is 16 bits.

const Prefix32Bit = 0x67

In 64-bit mode, the instruction’s default address size is 64 bits, 32 bit address size is supported using the prefix 67H.

const PtrSize = 32 << uintptr(^uintptr(0)>>63)
const RegEBP = 5
const RegESP = 4
const Scale1 = 0
const Scale2 = 1
const Scale4 = 2
const Scale8 = 3

Variables

var (
    AL  = Register{"al", 0, 8, []Qualifier{
        {REG: "al"},
        {R: 8},
        {RM: 8},
    }}
    AX  = Register{"ax", 0, 16, []Qualifier{
        {R: 16},
        {RM: 16},
    }}
    EAX = Register{"eax", 0, 32, []Qualifier{
        {R: 32},
        {RM: 32},
    }}
    RAX = Register{"rax", 0, 64, []Qualifier{
        {R: 64},
        {RM: 64},
    }}
    ECX = Register{"ecx", 1, 32, []Qualifier{
        {R: 32},
        {RM: 32},
    }}
    RCX = Register{"rcx", 1, 64, []Qualifier{
        {R: 64},
        {RM: 64},
    }}
    EDX = Register{"edx", 2, 32, []Qualifier{
        {R: 32},
        {RM: 32},
    }}
    RDX = Register{"rdx", 2, 64, []Qualifier{
        {R: 64},
        {RM: 64},
    }}
    BL  = Register{"bl", 3, 8, []Qualifier{
        {R: 8},
        {RM: 8},
    }}
    BX  = Register{"bx", 3, 16, []Qualifier{
        {R: 16},
        {RM: 16},
    }}
    EBX = Register{"ebx", 3, 32, []Qualifier{
        {R: 32},
        {RM: 32},
    }}
    RBX = Register{"rbx", 3, 64, []Qualifier{
        {R: 64},
        {RM: 64},
    }}
    ESP = Register{"esp", 4, 32, []Qualifier{
        {R: 32},
        {RM: 32},
    }}
    RSP = Register{"rsp", 4, 64, []Qualifier{
        {R: 64},
        {RM: 64},
    }}
    EBP = Register{"ebp", 5, 32, []Qualifier{
        {R: 32},
        {RM: 32},
    }}
    RBP = Register{"rbp", 5, 64, []Qualifier{
        {R: 64},
        {RM: 64},
    }}
    ESI = Register{"esi", 6, 32, []Qualifier{
        {R: 32},
        {RM: 32},
    }}
    RSI = Register{"rsi", 6, 64, []Qualifier{
        {R: 64},
        {RM: 64},
    }}
    EDI = Register{"edi", 7, 32, []Qualifier{
        {R: 32},
        {RM: 32},
    }}
    RDI = Register{"rdi", 7, 64, []Qualifier{
        {R: 64},
        {RM: 64},
    }}

    R8D = Register{"r8d", 8, 32, []Qualifier{
        {R: 32},
        {RM: 32},
    }}
    R8  = Register{"r8", 8, 64, []Qualifier{
        {R: 64},
        {RM: 64},
    }}
    R9D = Register{"r9d", 9, 32, []Qualifier{
        {R: 32},
        {RM: 32},
    }}
    R9  = Register{"r9", 9, 64, []Qualifier{
        {R: 64},
        {RM: 64},
    }}
    R10D = Register{"r10d", 10, 32, []Qualifier{
        {R: 32},
        {RM: 32},
    }}
    R10 = Register{"r10", 10, 64, []Qualifier{
        {R: 64},
        {RM: 64},
    }}
    R11D = Register{"r11d", 11, 32, []Qualifier{
        {R: 32},
        {RM: 32},
    }}
    R11 = Register{"r11", 11, 64, []Qualifier{
        {R: 64},
        {RM: 64},
    }}
    R12D = Register{"r12d", 12, 32, []Qualifier{
        {R: 32},
        {RM: 32},
    }}
    R12 = Register{"r12", 12, 64, []Qualifier{
        {R: 64},
        {RM: 64},
    }}
    R13D = Register{"r13d", 13, 32, []Qualifier{
        {R: 32},
        {RM: 32},
    }}
    R13 = Register{"r13", 13, 64, []Qualifier{
        {R: 64},
        {RM: 64},
    }}
    R14D = Register{"r14d", 14, 32, []Qualifier{
        {R: 32},
        {RM: 32},
    }}
    R14 = Register{"r14", 14, 64, []Qualifier{
        {R: 64},
        {RM: 64},
    }}
    R15D = Register{"r15d", 15, 32, []Qualifier{
        {R: 32},
        {RM: 32},
    }}
    R15 = Register{"r15", 15, 64, []Qualifier{
        {R: 64},
        {RM: 64},
    }}
    XMM0 = Register{"xmm0", 0, 128, []Qualifier{
        {REG: "xmm"},
        {REG: "xmm", M: 128},
    }}
    XMM1 = Register{"xmm1", 1, 128, []Qualifier{
        {REG: "xmm"},
        {REG: "xmm", M: 128},
    }}
    XMM2 = Register{"xmm2", 2, 128, []Qualifier{
        {REG: "xmm"},
        {REG: "xmm", M: 128},
    }}
    XMM3 = Register{"xmm3", 3, 128, []Qualifier{
        {REG: "xmm"},
        {REG: "xmm", M: 128},
    }}
    XMM4 = Register{"xmm4", 4, 128, []Qualifier{
        {REG: "xmm"},
        {REG: "xmm", M: 128},
    }}
    XMM5 = Register{"xmm5", 5, 128, []Qualifier{
        {REG: "xmm"},
        {REG: "xmm", M: 128},
    }}
    XMM6 = Register{"xmm6", 6, 128, []Qualifier{
        {REG: "xmm"},
        {REG: "xmm", M: 128},
    }}
    XMM7 = Register{"xmm7", 7, 128, []Qualifier{
        {REG: "xmm"},
        {REG: "xmm", M: 128},
    }}
)
var ABSOLUTE = Register{desc: "ABSOLUTE", bits: 64}
var ADD = &instruction{
    mnemonic: "add",
    opcode:   0x00,
    encoding: twoOperands,
    variants: variants{
        {{RM: 8}, {R: 8}}:         {},
        {{RM: 16}, {R: 16}}:       {opcode: 0x01},
        {{RM: 32}, {R: 32}}:       {opcode: 0x01},
        {{RM: 64}, {R: 64}}:       {opcode: 0x01},
        {{R: 8}, {RM: 8}}:         {opcode: 0x02},
        {{R: 16}, {RM: 16}}:       {opcode: 0x03},
        {{R: 32}, {RM: 32}}:       {opcode: 0x03},
        {{R: 64}, {RM: 64}}:       {opcode: 0x03},
        {{REG: "al"}, {IMM: 8}}:   {opcode: 0x04, encoding: encodingI},
        {{REG: "ax"}, {IMM: 16}}:  {opcode: 0x05, encoding: encodingI},
        {{REG: "eax"}, {IMM: 32}}: {opcode: 0x05, encoding: encodingI},
        {{RM: 8}, {IMM: 8}}:       {opcode: 0x80},
        {{RM: 16}, {IMM: 16}}:     {opcode: 0x81},
        {{RM: 32}, {IMM: 32}}:     {opcode: 0x81},
        {{RM: 64}, {IMM: 64}}:     {opcode: 0x81},
        {{RM: 16}, {IMM: 8}}:      {opcode: 0x83},
        {{RM: 32}, {IMM: 8}}:      {opcode: 0x83},
        {{RM: 64}, {IMM: 8}}:      {opcode: 0x83},
    },
}
var DEC = &instruction{
    mnemonic:  "dec",
    opcode:    0xff,
    opcodeReg: 1,
    encoding:  oneOperand,
    variants: variants{
        {{RM: 8}}:  {opcode: 0xfe},
        {{RM: 16}}: {},
        {{RM: 32}}: {},
        {{RM: 64}}: {},
    },
}
var INC = &instruction{
    mnemonic: "inc",
    opcode:   0xff,
    encoding: oneOperand,
    variants: variants{
        {{RM: 8}}:  {opcode: 0xfe},
        {{RM: 16}}: {},
        {{RM: 32}}: {},
        {{RM: 64}}: {},
    },
}
var MOV = &instruction{
    mnemonic: "mov",
    opcode:   0x88,
    encoding: twoOperands,
    variants: variants{
        {{RM: 8}, {R: 8}}:   {},
        {{RM: 16}, {R: 16}}: {opcode: 0x89},
        {{RM: 32}, {R: 32}}: {opcode: 0x89},
        {{RM: 64}, {R: 64}}: {opcode: 0x89},
        {{R: 8}, {RM: 8}}:   {opcode: 0x8a},
        {{R: 16}, {RM: 16}}: {opcode: 0x8b},
        {{R: 32}, {RM: 32}}: {opcode: 0x8b},
        {{R: 64}, {RM: 64}}: {opcode: 0x8b},
        {{REG: "xmm"}, {REG: "xmm", M: 128}}: {

            vexForm: form0F, opcode: 0x28, encoding: encodingA,
        },
        {{REG: "xmm", M: 128}, {REG: "xmm"}}: {

            vexForm: form0F, opcode: 0x29, encoding: encodingB,
        },
    },
}
var MOVAPS = &instruction{
    mnemonic: "movaps",
    vexForm:  form0F,
    opcode:   0x28,
    encoding: twoOperands,
    variants: variants{
        {{REG: "xmm"}, {REG: "xmm", M: 128}}: {encoding: encodingA},
        {{REG: "xmm", M: 128}, {REG: "xmm"}}: {opcode: 0x29, encoding: encodingB},
    },
}
var MOVD = &instruction{
    mnemonic: "movd",
    vexForm:  formVEX2,
    vexPP:    1,
    opcode:   0x6e,
    encoding: twoOperands,
    variants: variants{
        {{REG: "xmm"}, {RM: 32}}: {encoding: encodingA},
    },
}
var OR = &instruction{
    mnemonic: "or",
    opcode:   0x09,
    encoding: twoOperands,
    variants: variants{
        {{RM: 16}, {R: 16}}: {},
        {{RM: 32}, {R: 32}}: {},
        {{RM: 64}, {R: 64}}: {},
    },
}
var RET = &instruction{
    mnemonic: "ret",
    opcode:   0xc3,
    encoding: zeroOperand,
}
var RIP = Register{desc: "RIP", bits: 64}
var SHL = &instruction{
    mnemonic:  "shl",
    opcode:    0xc0,
    opcodeReg: 4,
    encoding:  twoOperands,
    variants: variants{
        {{RM: 16}, {IMM: 8}}: {opcode: 0xc1},
        {{RM: 32}, {IMM: 8}}: {opcode: 0xc1},
        {{RM: 64}, {IMM: 8}}: {opcode: 0xc1},
    },
}
var VMOVAPS = &instruction{
    mnemonic: "vmovaps",
    vexForm:  formVEX2,
    opcode:   0x28,
    encoding: twoOperands,
    variants: variants{
        {{REG: "xmm"}, {REG: "xmm", M: 128}}: {encoding: encodingA},
        {{REG: "xmm", M: 128}, {REG: "xmm"}}: {opcode: 0x29, encoding: encodingB},
    },
}
var VPACKSSDW = &instruction{
    mnemonic: "vpackssdw",
    vexForm:  formVEX2,
    vexPP:    1,
    opcode:   0x6b,
    encoding: threeOperands,
    variants: variants{
        {{REG: "xmm"}, {REG: "xmm"}, {REG: "xmm", M: 128}}: {encoding: encodingB3},
    },
}
var VPACKSSWB = &instruction{
    mnemonic: "vpacksswb",
    vexForm:  formVEX2,
    vexPP:    1,
    opcode:   0x63,
    encoding: threeOperands,
    variants: variants{
        {{REG: "xmm"}, {REG: "xmm"}, {REG: "xmm", M: 128}}: {encoding: encodingB3},
    },
}
var VPBROADCASTD = &instruction{
    mnemonic: "vpbroadcastd",
    vexForm:  formVEX3,
    vexPP:    1,
    opcode:   0x58,
    encoding: twoOperands,
    variants: variants{
        {{REG: "xmm"}, {REG: "xmm"}}: {encoding: encodingA},
    },
}
var VPCMPEQD = &instruction{
    mnemonic: "vpcmpeqd",
    vexForm:  formVEX2,
    vexPP:    1,
    opcode:   0x76,
    encoding: threeOperands,
    variants: variants{
        {{REG: "xmm"}, {REG: "xmm"}, {REG: "xmm", M: 128}}: {encoding: encodingB3},
    },
}
var VPMOVMSKB = &instruction{
    mnemonic: "vpmovmskb",
    vexForm:  formVEX2,
    vexPP:    1,
    opcode:   0xd7,
    encoding: twoOperands,
    variants: variants{
        {{R: 32}, {REG: "xmm"}}: {encoding: encodingRM},
    },
}

func BYTE Uses

func BYTE(base Register, offset int) interface{}

func BYTE_SIB Uses

func BYTE_SIB(scale byte, index Register, base Register, offset int) interface{}

func DWORD Uses

func DWORD(base Register, offset int) interface{}

func DWORD_SIB Uses

func DWORD_SIB(scale byte, index Register, base Register, offset int) interface{}

func Dump Uses

func Dump(instructions ...interface{}) string

func HaveAVX Uses

func HaveAVX() bool

HaveAVX returns true when there is AVX support

func HaveAVX2 Uses

func HaveAVX2() bool

HaveAVX2 returns true when there is AVX2 support

func HaveAVX512 Uses

func HaveAVX512() bool

HaveAVX512 returns true when there is AVX512 support

func HaveSSSE3 Uses

func HaveSSSE3() bool

HaveSSSE3 returns true when there is SSSE3 support

func IMM Uses

func IMM(val uint32) interface{}

func MODRM Uses

func MODRM(mod byte, reg byte, rm byte) byte

func QWORD Uses

func QWORD(base Register, offset int) interface{}

func QWORD_SIB Uses

func QWORD_SIB(scale byte, index Register, base Register, offset int) interface{}

func REX Uses

func REX(w, r, x, b bool) byte

func SIB Uses

func SIB(scale byte, index byte, base byte) byte

func VEX2 Uses

func VEX2(r, vvvv, l, pp byte) byte

func VEX31 Uses

func VEX31(r, x, b, m byte) byte

func VEX32 Uses

func VEX32(w, vvvv, l, pp byte) byte

func WORD Uses

func WORD(base Register, offset int) interface{}

func WORD_SIB Uses

func WORD_SIB(scale byte, index Register, base Register, offset int) interface{}

func XMMWORD Uses

func XMMWORD(base Register, offset int) interface{}

type AbsoluteIndirect Uses

type AbsoluteIndirect struct {
    Indirect
}

type Assembler Uses

type Assembler struct {
    Buffer []byte
    Error  error
}

func (*Assembler) Assemble Uses

func (asm *Assembler) Assemble(instructions ...interface{})

func (*Assembler) MakeFunc Uses

func (asm *Assembler) MakeFunc(f interface{})

func (*Assembler) ReportError Uses

func (asm *Assembler) ReportError(err error)

type Immediate Uses

type Immediate struct {
    // contains filtered or unexported fields
}

func (Immediate) Bits Uses

func (i Immediate) Bits() byte

func (Immediate) Qualifiers Uses

func (i Immediate) Qualifiers() []Qualifier

func (Immediate) String Uses

func (i Immediate) String() string

type Indirect Uses

type Indirect struct {
    // contains filtered or unexported fields
}

func (Indirect) Bits Uses

func (i Indirect) Bits() byte

func (Indirect) Qualifiers Uses

func (i Indirect) Qualifiers() []Qualifier

func (Indirect) String Uses

func (i Indirect) String() string

type Operand Uses

type Operand interface {
    fmt.Stringer

    Qualifiers() []Qualifier
    Bits() byte
    // contains filtered or unexported methods
}

type Qualifier Uses

type Qualifier struct {
    R   byte   // register, size
    M   byte   // memory, size
    RM  byte   // register or memory, size
    IMM byte   // immediate, size
    REG string // special register
}

type Register Uses

type Register struct {
    // contains filtered or unexported fields
}

func (Register) Bits Uses

func (r Register) Bits() byte

func (Register) Qualifiers Uses

func (r Register) Qualifiers() []Qualifier

func (Register) String Uses

func (r Register) String() string

func (Register) Value Uses

func (r Register) Value() byte

type RipIndirect Uses

type RipIndirect struct {
    Indirect
}

type ScaledIndirect Uses

type ScaledIndirect struct {
    Indirect
    // contains filtered or unexported fields
}

func (ScaledIndirect) String Uses

func (i ScaledIndirect) String() string

type VariantKey Uses

type VariantKey [3]Qualifier

Directories

PathSynopsis
tests

Package amd64 imports 6 packages (graph). Updated 2018-03-09. Refresh now. Tools for package owners.