Documentation
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Overview ¶
Package ppc64asm implements decoding of 64-bit PowerPC machine code.
Index ¶
Constants ¶
This section is empty.
Variables ¶
This section is empty.
Functions ¶
func GNUSyntax ¶
GNUSyntax returns the GNU assembler syntax for the instruction, as defined by GNU binutils. This form typically matches the syntax defined in the Power ISA Reference Manual.
func GoSyntax ¶
GoSyntax returns the Go assembler syntax for the instruction. The pc is the program counter of the first instruction, used for expanding PC-relative addresses into absolute ones. The symname function queries the symbol table for the program being disassembled. It returns the name and base address of the symbol containing the target, if any; otherwise it returns "", 0.
Types ¶
type Arg ¶
type Arg interface {
IsArg()
String() string
}
An Arg is a single instruction argument, one of these types: Reg, CondReg, SpReg, Imm, PCRel, Label, or Offset.
type ArgType ¶
type ArgType int8
const ( TypeUnknown ArgType = iota TypePCRel // PC-relative address TypeLabel // absolute address TypeReg // integer register TypeCondRegBit // conditional register bit (0-31) TypeCondRegField // conditional register field (0-7) TypeFPReg // floating point register TypeVecReg // vector register TypeVecSReg // VSX register TypeVecSpReg // VSX register pair (even only encoding) TypeMMAReg // MMA register TypeSpReg // special register (depends on Op) TypeImmSigned // signed immediate TypeImmUnsigned // unsigned immediate/flag/mask, this is the catch-all type TypeOffset // signed offset in load/store TypeNegOffset // A negative 16 bit value 0b1111111xxxxx000 encoded as 0bxxxxx (e.g in the hashchk instruction) TypeLast // must be the last one )
type Args ¶
type Args [6]Arg
An Args holds the instruction arguments. If an instruction has fewer than 6 arguments, the final elements in the array are nil.
type BitField ¶
type BitField struct {
Offs uint8 // the offset of the left-most bit.
Bits uint8 // length in bits.
// This instruction word holding this field.
// It is always 0 for ISA < 3.1 instructions. It is
// in decoding order. (0 == prefix, 1 == suffix on ISA 3.1)
Word uint8
}
A BitField is a bit-field in a 32-bit word. Bits are counted from 0 from the MSB to 31 as the LSB.
func (BitField) Parse ¶
Parse extracts the bitfield b from i, and return it as an unsigned integer. Parse will panic if b is invalid.
func (BitField) ParseSigned ¶
ParseSigned extracts the bitfield b from i, and return it as a signed integer. ParseSigned will panic if b is invalid.
type BitFields ¶
type BitFields []BitField
BitFields is a series of BitFields representing a single number.
func (BitFields) Parse ¶
Parse extracts the bitfields from i, concatenate them and return the result as an unsigned integer. Parse will panic if any bitfield in b is invalid.
func (BitFields) ParseSigned ¶
ParseSigned extracts the bitfields from i, concatenate them and return the result as a signed integer. Parse will panic if any bitfield in b is invalid.
type CondReg ¶
type CondReg int8
CondReg is a bit or field in the condition register.
const ( // Condition Regster bits Cond0LT CondReg Cond0GT Cond0EQ Cond0SO Cond1LT Cond1GT Cond1EQ Cond1SO Cond2LT Cond2GT Cond2EQ Cond2SO Cond3LT Cond3GT Cond3EQ Cond3SO Cond4LT Cond4GT Cond4EQ Cond4SO Cond5LT Cond5GT Cond5EQ Cond5SO Cond6LT Cond6GT Cond6EQ Cond6SO Cond7LT Cond7GT Cond7EQ Cond7SO // Condition Register Fields CR0 CR1 CR2 CR3 CR4 CR5 CR6 CR7 )
type Inst ¶
type Inst struct {
Op Op // Opcode mnemonic
Enc uint32 // Raw encoding bits (if Len == 8, this is the prefix word)
Len int // Length of encoding in bytes.
SuffixEnc uint32 // Raw encoding bits of second word (if Len == 8)
Args Args // Instruction arguments, in Power ISA manual order.
}
type Label ¶
type Label uint32
A Label is a code (text) address, used only in absolute branch instructions.
type Op ¶
type Op uint16
An Op is an instruction operation.
const ( HASHCHK Op HASHCHKP HASHST HASHSTP BRD BRH BRW CFUGED CNTLZDM CNTTZDM DCFFIXQQ DCTFIXQQ LXVKQ LXVP LXVPX LXVRBX LXVRDX LXVRHX LXVRWX MTVSRBM MTVSRBMI MTVSRDM MTVSRHM MTVSRQM MTVSRWM PADDI PDEPD PEXTD PLBZ PLD PLFD PLFS PLHA PLHZ PLQ PLWA PLWZ PLXSD PLXSSP PLXV PLXVP PMXVBF16GER2 PMXVBF16GER2NN PMXVBF16GER2NP PMXVBF16GER2PN PMXVBF16GER2PP PMXVF16GER2 PMXVF16GER2NN PMXVF16GER2NP PMXVF16GER2PN PMXVF16GER2PP PMXVF32GER PMXVF32GERNN PMXVF32GERNP PMXVF32GERPN PMXVF32GERPP PMXVF64GER PMXVF64GERNN PMXVF64GERNP PMXVF64GERPN PMXVF64GERPP PMXVI16GER2 PMXVI16GER2PP PMXVI16GER2S PMXVI16GER2SPP PMXVI4GER8 PMXVI4GER8PP PMXVI8GER4 PMXVI8GER4PP PMXVI8GER4SPP PNOP PSTB PSTD PSTFD PSTFS PSTH PSTQ PSTW PSTXSD PSTXSSP PSTXV PSTXVP SETBC SETBCR SETNBC SETNBCR STXVP STXVPX STXVRBX STXVRDX STXVRHX STXVRWX VCFUGED VCLRLB VCLRRB VCLZDM VCMPEQUQ VCMPEQUQCC VCMPGTSQ VCMPGTSQCC VCMPGTUQ VCMPGTUQCC VCMPSQ VCMPUQ VCNTMBB VCNTMBD VCNTMBH VCNTMBW VCTZDM VDIVESD VDIVESQ VDIVESW VDIVEUD VDIVEUQ VDIVEUW VDIVSD VDIVSQ VDIVSW VDIVUD VDIVUQ VDIVUW VEXPANDBM VEXPANDDM VEXPANDHM VEXPANDQM VEXPANDWM VEXTDDVLX VEXTDDVRX VEXTDUBVLX VEXTDUBVRX VEXTDUHVLX VEXTDUHVRX VEXTDUWVLX VEXTDUWVRX VEXTRACTBM VEXTRACTDM VEXTRACTHM VEXTRACTQM VEXTRACTWM VEXTSD2Q VGNB VINSBLX VINSBRX VINSBVLX VINSBVRX VINSD VINSDLX VINSDRX VINSHLX VINSHRX VINSHVLX VINSHVRX VINSW VINSWLX VINSWRX VINSWVLX VINSWVRX VMODSD VMODSQ VMODSW VMODUD VMODUQ VMODUW VMSUMCUD VMULESD VMULEUD VMULHSD VMULHSW VMULHUD VMULHUW VMULLD VMULOSD VMULOUD VPDEPD VPEXTD VRLQ VRLQMI VRLQNM VSLDBI VSLQ VSRAQ VSRDBI VSRQ VSTRIBL VSTRIBLCC VSTRIBR VSTRIBRCC VSTRIHL VSTRIHLCC VSTRIHR VSTRIHRCC XSCMPEQQP XSCMPGEQP XSCMPGTQP XSCVQPSQZ XSCVQPUQZ XSCVSQQP XSCVUQQP XSMAXCQP XSMINCQP XVBF16GER2 XVBF16GER2NN XVBF16GER2NP XVBF16GER2PN XVBF16GER2PP XVCVBF16SPN XVCVSPBF16 XVF16GER2 XVF16GER2NN XVF16GER2NP XVF16GER2PN XVF16GER2PP XVF32GER XVF32GERNN XVF32GERNP XVF32GERPN XVF32GERPP XVF64GER XVF64GERNN XVF64GERNP XVF64GERPN XVF64GERPP XVI16GER2 XVI16GER2PP XVI16GER2S XVI16GER2SPP XVI4GER8 XVI4GER8PP XVI8GER4 XVI8GER4PP XVI8GER4SPP XVTLSBB XXBLENDVB XXBLENDVD XXBLENDVH XXBLENDVW XXEVAL XXGENPCVBM XXGENPCVDM XXGENPCVHM XXGENPCVWM XXMFACC XXMTACC XXPERMX XXSETACCZ XXSPLTI32DX XXSPLTIDP XXSPLTIW MSGCLRU MSGSNDU URFID ADDEX MFFSCDRN MFFSCDRNI MFFSCE MFFSCRN MFFSCRNI MFFSL SLBIAG VMSUMUDM ADDPCIS BCDCFNCC BCDCFSQCC BCDCFZCC BCDCPSGNCC BCDCTNCC BCDCTSQCC BCDCTZCC BCDSCC BCDSETSGNCC BCDSRCC BCDTRUNCCC BCDUSCC BCDUTRUNCCC CMPEQB CMPRB CNTTZD CNTTZDCC CNTTZW CNTTZWCC COPY CPABORT DARN DTSTSFI DTSTSFIQ EXTSWSLI EXTSWSLICC LDAT LWAT LXSD LXSIBZX LXSIHZX LXSSP LXV LXVB16X LXVH8X LXVL LXVLL LXVWSX LXVX MADDHD MADDHDU MADDLD MCRXRX MFVSRLD MODSD MODSW MODUD MODUW MSGSYNC MTVSRDD MTVSRWS PASTECC SETB SLBIEG SLBSYNC STDAT STOP STWAT STXSD STXSIBX STXSIHX STXSSP STXV STXVB16X STXVH8X STXVL STXVLL STXVX VABSDUB VABSDUH VABSDUW VBPERMD VCLZLSBB VCMPNEB VCMPNEBCC VCMPNEH VCMPNEHCC VCMPNEW VCMPNEWCC VCMPNEZB VCMPNEZBCC VCMPNEZH VCMPNEZHCC VCMPNEZW VCMPNEZWCC VCTZB VCTZD VCTZH VCTZLSBB VCTZW VEXTRACTD VEXTRACTUB VEXTRACTUH VEXTRACTUW VEXTSB2D VEXTSB2W VEXTSH2D VEXTSH2W VEXTSW2D VEXTUBLX VEXTUBRX VEXTUHLX VEXTUHRX VEXTUWLX VEXTUWRX VINSERTB VINSERTD VINSERTH VINSERTW VMUL10CUQ VMUL10ECUQ VMUL10EUQ VMUL10UQ VNEGD VNEGW VPERMR VPRTYBD VPRTYBQ VPRTYBW VRLDMI VRLDNM VRLWMI VRLWNM VSLV VSRV WAIT XSABSQP XSADDQP XSADDQPO XSCMPEQDP XSCMPEXPDP XSCMPEXPQP XSCMPGEDP XSCMPGTDP XSCMPOQP XSCMPUQP XSCPSGNQP XSCVDPHP XSCVDPQP XSCVHPDP XSCVQPDP XSCVQPDPO XSCVQPSDZ XSCVQPSWZ XSCVQPUDZ XSCVQPUWZ XSCVSDQP XSCVUDQP XSDIVQP XSDIVQPO XSIEXPDP XSIEXPQP XSMADDQP XSMADDQPO XSMAXCDP XSMAXJDP XSMINCDP XSMINJDP XSMSUBQP XSMSUBQPO XSMULQP XSMULQPO XSNABSQP XSNEGQP XSNMADDQP XSNMADDQPO XSNMSUBQP XSNMSUBQPO XSRQPI XSRQPIX XSRQPXP XSSQRTQP XSSQRTQPO XSSUBQP XSSUBQPO XSTSTDCDP XSTSTDCQP XSTSTDCSP XSXEXPDP XSXEXPQP XSXSIGDP XSXSIGQP XVCVHPSP XVCVSPHP XVIEXPDP XVIEXPSP XVTSTDCDP XVTSTDCSP XVXEXPDP XVXEXPSP XVXSIGDP XVXSIGSP XXBRD XXBRH XXBRQ XXBRW XXEXTRACTUW XXINSERTW XXPERM XXPERMR XXSPLTIB BCDADDCC BCDSUBCC BCTAR BCTARL CLRBHRB FMRGEW FMRGOW ICBT LQARX LXSIWAX LXSIWZX LXSSPX MFBHRBE MFVSRD MFVSRWZ MSGCLR MSGCLRP MSGSND MSGSNDP MTVSRD MTVSRWA MTVSRWZ RFEBB STQCXCC STXSIWX STXSSPX VADDCUQ VADDECUQ VADDEUQM VADDUDM VADDUQM VBPERMQ VCIPHER VCIPHERLAST VCLZB VCLZD VCLZH VCLZW VCMPEQUD VCMPEQUDCC VCMPGTSD VCMPGTSDCC VCMPGTUD VCMPGTUDCC VEQV VGBBD VMAXSD VMAXUD VMINSD VMINUD VMRGEW VMRGOW VMULESW VMULEUW VMULOSW VMULOUW VMULUWM VNAND VNCIPHER VNCIPHERLAST VORC VPERMXOR VPKSDSS VPKSDUS VPKUDUM VPKUDUS VPMSUMB VPMSUMD VPMSUMH VPMSUMW VPOPCNTB VPOPCNTD VPOPCNTH VPOPCNTW VRLD VSBOX VSHASIGMAD VSHASIGMAW VSLD VSRAD VSRD VSUBCUQ VSUBECUQ VSUBEUQM VSUBUDM VSUBUQM VUPKHSW VUPKLSW XSADDSP XSCVDPSPN XSCVSPDPN XSCVSXDSP XSCVUXDSP XSDIVSP XSMADDASP XSMADDMSP XSMSUBASP XSMSUBMSP XSMULSP XSNMADDASP XSNMADDMSP XSNMSUBASP XSNMSUBMSP XSRESP XSRSP XSRSQRTESP XSSQRTSP XSSUBSP XXLEQV XXLNAND XXLORC ADDG6S BPERMD CBCDTD CDTBCD DCFFIX DCFFIXCC DIVDE DIVDECC DIVDEO DIVDEOCC DIVDEU DIVDEUCC DIVDEUO DIVDEUOCC DIVWE DIVWECC DIVWEO DIVWEOCC DIVWEU DIVWEUCC DIVWEUO DIVWEUOCC FCFIDS FCFIDSCC FCFIDU FCFIDUCC FCFIDUS FCFIDUSCC FCTIDU FCTIDUCC FCTIDUZ FCTIDUZCC FCTIWU FCTIWUCC FCTIWUZ FCTIWUZCC FTDIV FTSQRT LBARX LDBRX LFIWZX LHARX LXSDX LXVD2X LXVDSX LXVW4X POPCNTD POPCNTW STBCXCC STDBRX STHCXCC STXSDX STXVD2X STXVW4X XSABSDP XSADDDP XSCMPODP XSCMPUDP XSCPSGNDP XSCVDPSP XSCVDPSXDS XSCVDPSXWS XSCVDPUXDS XSCVDPUXWS XSCVSPDP XSCVSXDDP XSCVUXDDP XSDIVDP XSMADDADP XSMADDMDP XSMAXDP XSMINDP XSMSUBADP XSMSUBMDP XSMULDP XSNABSDP XSNEGDP XSNMADDADP XSNMADDMDP XSNMSUBADP XSNMSUBMDP XSRDPI XSRDPIC XSRDPIM XSRDPIP XSRDPIZ XSREDP XSRSQRTEDP XSSQRTDP XSSUBDP XSTDIVDP XSTSQRTDP XVABSDP XVABSSP XVADDDP XVADDSP XVCMPEQDP XVCMPEQDPCC XVCMPEQSP XVCMPEQSPCC XVCMPGEDP XVCMPGEDPCC XVCMPGESP XVCMPGESPCC XVCMPGTDP XVCMPGTDPCC XVCMPGTSP XVCMPGTSPCC XVCPSGNDP XVCPSGNSP XVCVDPSP XVCVDPSXDS XVCVDPSXWS XVCVDPUXDS XVCVDPUXWS XVCVSPDP XVCVSPSXDS XVCVSPSXWS XVCVSPUXDS XVCVSPUXWS XVCVSXDDP XVCVSXDSP XVCVSXWDP XVCVSXWSP XVCVUXDDP XVCVUXDSP XVCVUXWDP XVCVUXWSP XVDIVDP XVDIVSP XVMADDADP XVMADDASP XVMADDMDP XVMADDMSP XVMAXDP XVMAXSP XVMINDP XVMINSP XVMSUBADP XVMSUBASP XVMSUBMDP XVMSUBMSP XVMULDP XVMULSP XVNABSDP XVNABSSP XVNEGDP XVNEGSP XVNMADDADP XVNMADDASP XVNMADDMDP XVNMADDMSP XVNMSUBADP XVNMSUBASP XVNMSUBMDP XVNMSUBMSP XVRDPI XVRDPIC XVRDPIM XVRDPIP XVRDPIZ XVREDP XVRESP XVRSPI XVRSPIC XVRSPIM XVRSPIP XVRSPIZ XVRSQRTEDP XVRSQRTESP XVSQRTDP XVSQRTSP XVSUBDP XVSUBSP XVTDIVDP XVTDIVSP XVTSQRTDP XVTSQRTSP XXLAND XXLANDC XXLNOR XXLOR XXLXOR XXMRGHW XXMRGLW XXPERMDI XXSEL XXSLDWI XXSPLTW CMPB DADD DADDCC DADDQ DADDQCC DCFFIXQ DCFFIXQCC DCMPO DCMPOQ DCMPU DCMPUQ DCTDP DCTDPCC DCTFIX DCTFIXCC DCTFIXQ DCTFIXQCC DCTQPQ DCTQPQCC DDEDPD DDEDPDCC DDEDPDQ DDEDPDQCC DDIV DDIVCC DDIVQ DDIVQCC DENBCD DENBCDCC DENBCDQ DENBCDQCC DIEX DIEXCC DIEXQCC DIEXQ DMUL DMULCC DMULQ DMULQCC DQUA DQUACC DQUAI DQUAICC DQUAIQ DQUAIQCC DQUAQ DQUAQCC DRDPQ DRDPQCC DRINTN DRINTNCC DRINTNQ DRINTNQCC DRINTX DRINTXCC DRINTXQ DRINTXQCC DRRND DRRNDCC DRRNDQ DRRNDQCC DRSP DRSPCC DSCLI DSCLICC DSCLIQ DSCLIQCC DSCRI DSCRICC DSCRIQ DSCRIQCC DSUB DSUBCC DSUBQ DSUBQCC DTSTDC DTSTDCQ DTSTDG DTSTDGQ DTSTEX DTSTEXQ DTSTSF DTSTSFQ DXEX DXEXCC DXEXQ DXEXQCC FCPSGN FCPSGNCC LBZCIX LDCIX LFDP LFDPX LFIWAX LHZCIX LWZCIX PRTYD PRTYW SLBFEECC STBCIX STDCIX STFDP STFDPX STHCIX STWCIX ISEL LVEBX LVEHX LVEWX LVSL LVSR LVX LVXL MFVSCR MTVSCR STVEBX STVEHX STVEWX STVX STVXL TLBIEL VADDCUW VADDFP VADDSBS VADDSHS VADDSWS VADDUBM VADDUBS VADDUHM VADDUHS VADDUWM VADDUWS VAND VANDC VAVGSB VAVGSH VAVGSW VAVGUB VAVGUH VAVGUW VCFSX VCFUX VCMPBFP VCMPBFPCC VCMPEQFP VCMPEQFPCC VCMPEQUB VCMPEQUBCC VCMPEQUH VCMPEQUHCC VCMPEQUW VCMPEQUWCC VCMPGEFP VCMPGEFPCC VCMPGTFP VCMPGTFPCC VCMPGTSB VCMPGTSBCC VCMPGTSH VCMPGTSHCC VCMPGTSW VCMPGTSWCC VCMPGTUB VCMPGTUBCC VCMPGTUH VCMPGTUHCC VCMPGTUW VCMPGTUWCC VCTSXS VCTUXS VEXPTEFP VLOGEFP VMADDFP VMAXFP VMAXSB VMAXSH VMAXSW VMAXUB VMAXUH VMAXUW VMHADDSHS VMHRADDSHS VMINFP VMINSB VMINSH VMINSW VMINUB VMINUH VMINUW VMLADDUHM VMRGHB VMRGHH VMRGHW VMRGLB VMRGLH VMRGLW VMSUMMBM VMSUMSHM VMSUMSHS VMSUMUBM VMSUMUHM VMSUMUHS VMULESB VMULESH VMULEUB VMULEUH VMULOSB VMULOSH VMULOUB VMULOUH VNMSUBFP VNOR VOR VPERM VPKPX VPKSHSS VPKSHUS VPKSWSS VPKSWUS VPKUHUM VPKUHUS VPKUWUM VPKUWUS VREFP VRFIM VRFIN VRFIP VRFIZ VRLB VRLH VRLW VRSQRTEFP VSEL VSL VSLB VSLDOI VSLH VSLO VSLW VSPLTB VSPLTH VSPLTISB VSPLTISH VSPLTISW VSPLTW VSR VSRAB VSRAH VSRAW VSRB VSRH VSRO VSRW VSUBCUW VSUBFP VSUBSBS VSUBSHS VSUBSWS VSUBUBM VSUBUBS VSUBUHM VSUBUHS VSUBUWM VSUBUWS VSUM2SWS VSUM4SBS VSUM4SHS VSUM4UBS VSUMSWS VUPKHPX VUPKHSB VUPKHSH VUPKLPX VUPKLSB VUPKLSH VXOR FRE FRECC FRIM FRIMCC FRIN FRINCC FRIP FRIPCC FRIZ FRIZCC FRSQRTES FRSQRTESCC HRFID POPCNTB MFOCRF MTOCRF SLBMFEE SLBMFEV SLBMTE RFSCV SCV LQ STQ CNTLZD CNTLZDCC DCBF DCBST DCBT DCBTST DIVD DIVDCC DIVDO DIVDOCC DIVDU DIVDUCC DIVDUO DIVDUOCC DIVW DIVWCC DIVWO DIVWOCC DIVWU DIVWUCC DIVWUO DIVWUOCC EIEIO EXTSB EXTSBCC EXTSW EXTSWCC FADDS FADDSCC FCFID FCFIDCC FCTID FCTIDCC FCTIDZ FCTIDZCC FDIVS FDIVSCC FMADDS FMADDSCC FMSUBS FMSUBSCC FMULS FMULSCC FNMADDS FNMADDSCC FNMSUBS FNMSUBSCC FRES FRESCC FRSQRTE FRSQRTECC FSEL FSELCC FSQRTS FSQRTSCC FSUBS FSUBSCC ICBI LD LDARX LDU LDUX LDX LWA LWARX LWAUX LWAX MFTB MTMSRD MULHD MULHDCC MULHDU MULHDUCC MULHW MULHWCC MULHWU MULHWUCC MULLD MULLDCC MULLDO MULLDOCC RFID RLDCL RLDCLCC RLDCR RLDCRCC RLDIC RLDICCC RLDICL RLDICLCC RLDICR RLDICRCC RLDIMI RLDIMICC SC SLBIA SLBIE SLD SLDCC SRAD SRADCC SRADI SRADICC SRD SRDCC STD STDCXCC STDU STDUX STDX STFIWX STWCXCC SUBF SUBFCC SUBFO SUBFOCC TD TDI TLBSYNC FCTIW FCTIWCC FCTIWZ FCTIWZCC FSQRT FSQRTCC ADD ADDCC ADDO ADDOCC ADDC ADDCCC ADDCO ADDCOCC ADDE ADDECC ADDEO ADDEOCC LI ADDI ADDIC ADDICCC LIS ADDIS ADDME ADDMECC ADDMEO ADDMEOCC ADDZE ADDZECC ADDZEO ADDZEOCC AND ANDCC ANDC ANDCCC ANDICC ANDISCC B BA BL BLA BC BCA BCL BCLA BCCTR BCCTRL BCLR BCLRL CMPW CMPD CMP CMPWI CMPDI CMPI CMPLW CMPLD CMPL CMPLWI CMPLDI CMPLI CNTLZW CNTLZWCC CRAND CRANDC CREQV CRNAND CRNOR CROR CRORC CRXOR DCBZ EQV EQVCC EXTSH EXTSHCC FABS FABSCC FADD FADDCC FCMPO FCMPU FDIV FDIVCC FMADD FMADDCC FMR FMRCC FMSUB FMSUBCC FMUL FMULCC FNABS FNABSCC FNEG FNEGCC FNMADD FNMADDCC FNMSUB FNMSUBCC FRSP FRSPCC FSUB FSUBCC ISYNC LBZ LBZU LBZUX LBZX LFD LFDU LFDUX LFDX LFS LFSU LFSUX LFSX LHA LHAU LHAUX LHAX LHBRX LHZ LHZU LHZUX LHZX LMW LSWI LSWX LWBRX LWZ LWZU LWZUX LWZX MCRF MCRFS MFCR MFFS MFFSCC MFMSR MFSPR MTCRF MTFSB0 MTFSB0CC MTFSB1 MTFSB1CC MTFSF MTFSFCC MTFSFI MTFSFICC MTMSR MTSPR MULLI MULLW MULLWCC MULLWO MULLWOCC NAND NANDCC NEG NEGCC NEGO NEGOCC NOR NORCC OR ORCC ORC ORCCC NOP ORI ORIS RLWIMI RLWIMICC RLWINM RLWINMCC RLWNM RLWNMCC SLW SLWCC SRAW SRAWCC SRAWI SRAWICC SRW SRWCC STB STBU STBUX STBX STFD STFDU STFDUX STFDX STFS STFSU STFSUX STFSX STH STHBRX STHU STHUX STHX STMW STSWI STSWX STW STWBRX STWU STWUX STWX SUBFC SUBFCCC SUBFCO SUBFCOCC SUBFE SUBFECC SUBFEO SUBFEOCC SUBFIC SUBFME SUBFMECC SUBFMEO SUBFMEOCC SUBFZE SUBFZECC SUBFZEO SUBFZEOCC SYNC TLBIE TW TWI XOR XORCC XORI XORIS )
type Reg ¶
type Reg uint16
A Reg is a single register. The zero value means R0, not the absence of a register. It also includes special registers.
const ( R0 Reg R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29 R30 R31 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 V0 // VSX extension, F0 is V0[0:63]. V1 V2 V3 V4 V5 V6 V7 V8 V9 V10 V11 V12 V13 V14 V15 V16 V17 V18 V19 V20 V21 V22 V23 V24 V25 V26 V27 V28 V29 V30 V31 VS0 VS1 VS2 VS3 VS4 VS5 VS6 VS7 VS8 VS9 VS10 VS11 VS12 VS13 VS14 VS15 VS16 VS17 VS18 VS19 VS20 VS21 VS22 VS23 VS24 VS25 VS26 VS27 VS28 VS29 VS30 VS31 VS32 VS33 VS34 VS35 VS36 VS37 VS38 VS39 VS40 VS41 VS42 VS43 VS44 VS45 VS46 VS47 VS48 VS49 VS50 VS51 VS52 VS53 VS54 VS55 VS56 VS57 VS58 VS59 VS60 VS61 VS62 VS63 A0 // MMA registers. These are effectively shadow registers of four adjacent VSR's [An*4,An*4+3] A1 A2 A3 A4 A5 A6 A7 )
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