rpi

const (
	CM_CLK_CTL_PASSWD  = 0x5a << 24
	CM_CLK_CTL_BUSY    = 1 << 7
	CM_CLK_CTL_KILL    = 1 << 5
	CM_CLK_CTL_ENAB    = 1 << 4
	CM_CLK_CTL_SRC_OSC = 1 << 0
	CM_CLK_DIV_PASSWD  = uint32(0x5a << 24)
)

const (
	PAGE_SIZE       = 4096 // Theoretically, we could get this via whatever getconf does
	PWM_OFFSET      = uintptr(0x0020c000)
	GPIO_OFFSET     = uintptr(0x00200000)
	CM_PWM_OFFSET   = uintptr(0x001010a0)
	PWM_PERIPH_PHYS = uint32(0x7e20c000)
	OSC_FREQ        = 19200000 // crystal frequency
	OSC_FREQ_PI4    = 54000000 // Pi 4 crystal frequency
)

const (
	RPI_DMA_CS_RESET                      = 1 << 31
	RPI_DMA_CS_WAIT_OUTSTANDING_WRITES    = 1 << 28
	RPI_DMA_CS_ERROR                      = 1 << 8
	RPI_DMA_CS_WAITING_OUTSTANDING_WRITES = 1 << 6
	RPI_DMA_CS_INT                        = 1 << 2
	RPI_DMA_CS_END                        = 1 << 1
	RPI_DMA_CS_ACTIVE                     = 1 << 0
	RPI_DMA_TI_NO_WIDE_BURSTS             = 1 << 26
	RPI_DMA_TI_SRC_INC                    = 1 << 8
	RPI_DMA_TI_DEST_DREQ                  = 1 << 6
	RPI_DMA_TI_WAIT_RESP                  = 1 << 3
)

const (
	// See p101. These are GPPUD values
	PullNone = 0
	PullDown = 1
	PullUp   = 2
)

const (
	VIDEOCORE_MAJOR_NUM = 100
	MEM_FILE            = "/dev/mem"
	VCIO_FILE           = "/dev/vcio"
	MBOX_DEV            = 100 << 20 // Assumes devices have 12-bit major, 20-bit minor numbers
	MBOX_MODE           = 0600
	RPI_PWM_CHANNELS    = 2
)

const (
	RPI_PWM_CTL_USEF2 = 1 << 13
	RPI_PWM_CTL_MODE2 = 1 << 9
	RPI_PWM_CTL_PWEN2 = 1 << 8
	RPI_PWM_CTL_CLRF1 = 1 << 6
	RPI_PWM_CTL_USEF1 = 1 << 5
	RPI_PWM_CTL_MODE1 = 1 << 1
	RPI_PWM_CTL_PWEN1 = 1 << 0
	RPI_PWM_DMAC_ENAB = uint32(1 << 31)
)

const (
	RPI_HWVER_TYPE_UNKNOWN = iota
	RPI_HWVER_TYPE_PI1
	RPI_HWVER_TYPE_PI2
	RPI_HWVER_TYPE_PI4

	PERIPH_BASE_RPI  = 0x20000000
	PERIPH_BASE_RPI2 = 0x3f000000
	PERIPH_BASE_RPI4 = 0xfe000000

	VIDEOCORE_BASE_RPI  = 0x40000000
	VIDEOCORE_BASE_RPI2 = 0xc0000000
)

const (
	SPI_IOC_MAGIC           = 'k'
	SPI_IOC_WR_MAX_SPEED_HZ = 4
)