Documentation ¶
Index ¶
Constants ¶
This section is empty.
Variables ¶
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var Counters = [...]counter{ {"cpu-clock", unix.PERF_TYPE_SOFTWARE, unix.PERF_COUNT_SW_CPU_CLOCK, true}, {"task-clock", unix.PERF_TYPE_SOFTWARE, unix.PERF_COUNT_SW_TASK_CLOCK, true}, {"page-faults", unix.PERF_TYPE_SOFTWARE, unix.PERF_COUNT_SW_PAGE_FAULTS, true}, {"context-switches", unix.PERF_TYPE_SOFTWARE, unix.PERF_COUNT_SW_CONTEXT_SWITCHES, true}, {"cpu-migrations", unix.PERF_TYPE_SOFTWARE, unix.PERF_COUNT_SW_CPU_MIGRATIONS, true}, {"page-fault-minor", unix.PERF_TYPE_SOFTWARE, unix.PERF_COUNT_SW_PAGE_FAULTS_MIN, true}, {"page-fault-major", unix.PERF_TYPE_SOFTWARE, unix.PERF_COUNT_SW_PAGE_FAULTS_MAJ, false}, {"alignment-faults", unix.PERF_TYPE_SOFTWARE, unix.PERF_COUNT_SW_ALIGNMENT_FAULTS, false}, {"emulation-faults", unix.PERF_TYPE_SOFTWARE, unix.PERF_COUNT_SW_EMULATION_FAULTS, false}, {"cpu-cycles", unix.PERF_TYPE_HARDWARE, unix.PERF_COUNT_HW_CPU_CYCLES, true}, {"instructions", unix.PERF_TYPE_HARDWARE, unix.PERF_COUNT_HW_INSTRUCTIONS, true}, {"cache-references", unix.PERF_TYPE_HARDWARE, unix.PERF_COUNT_HW_CACHE_REFERENCES, false}, {"cache-misses", unix.PERF_TYPE_HARDWARE, unix.PERF_COUNT_HW_CACHE_MISSES, true}, {"branch-instructions", unix.PERF_TYPE_HARDWARE, unix.PERF_COUNT_HW_BRANCH_INSTRUCTIONS, false}, {"branch-misses", unix.PERF_TYPE_HARDWARE, unix.PERF_COUNT_HW_BRANCH_MISSES, false}, {"bus-cycles", unix.PERF_TYPE_HARDWARE, unix.PERF_COUNT_HW_BUS_CYCLES, false}, {"stalled-cycles-frontend", unix.PERF_TYPE_HARDWARE, unix.PERF_COUNT_HW_STALLED_CYCLES_FRONTEND, false}, {"stalled-cycles-backend", unix.PERF_TYPE_HARDWARE, unix.PERF_COUNT_HW_STALLED_CYCLES_BACKEND, false}, {"ref-cpu-cycles", unix.PERF_TYPE_HARDWARE, unix.PERF_COUNT_HW_REF_CPU_CYCLES, false}, {"L1D-read-access", unix.PERF_TYPE_HW_CACHE, cache(pL1D, pREAD, pACCESS), false}, {"L1D-read-miss", unix.PERF_TYPE_HW_CACHE, cache(pL1D, pREAD, pMISS), true}, {"L1D-write-access", unix.PERF_TYPE_HW_CACHE, cache(pL1D, pWRITE, pACCESS), false}, {"L1D-write-miss", unix.PERF_TYPE_HW_CACHE, cache(pL1D, pWRITE, pMISS), false}, {"L1D-prefetch-access", unix.PERF_TYPE_HW_CACHE, cache(pL1D, pPREFETCH, pACCESS), false}, {"L1D-prefetch-miss", unix.PERF_TYPE_HW_CACHE, cache(pL1D, pPREFETCH, pMISS), false}, {"L1I-read-access", unix.PERF_TYPE_HW_CACHE, cache(pL1I, pREAD, pACCESS), false}, {"L1I-read-miss", unix.PERF_TYPE_HW_CACHE, cache(pL1I, pREAD, pMISS), true}, {"L1I-write-access", unix.PERF_TYPE_HW_CACHE, cache(pL1I, pWRITE, pACCESS), false}, {"L1I-write-miss", unix.PERF_TYPE_HW_CACHE, cache(pL1I, pWRITE, pMISS), false}, {"L1I-prefetch-access", unix.PERF_TYPE_HW_CACHE, cache(pL1I, pPREFETCH, pACCESS), false}, {"L1I-prefetch-miss", unix.PERF_TYPE_HW_CACHE, cache(pL1I, pPREFETCH, pMISS), false}, {"LL-read-access", unix.PERF_TYPE_HW_CACHE, cache(pLL, pREAD, pACCESS), false}, {"LL-read-miss", unix.PERF_TYPE_HW_CACHE, cache(pLL, pREAD, pMISS), false}, {"LL-write-access", unix.PERF_TYPE_HW_CACHE, cache(pLL, pWRITE, pACCESS), false}, {"LL-write-miss", unix.PERF_TYPE_HW_CACHE, cache(pLL, pWRITE, pMISS), false}, {"LL-prefetch-access", unix.PERF_TYPE_HW_CACHE, cache(pLL, pPREFETCH, pACCESS), false}, {"LL-prefetch-miss", unix.PERF_TYPE_HW_CACHE, cache(pLL, pPREFETCH, pMISS), false}, {"DTLB-read-access", unix.PERF_TYPE_HW_CACHE, cache(pDTLB, pREAD, pACCESS), false}, {"DTLB-read-miss", unix.PERF_TYPE_HW_CACHE, cache(pDTLB, pREAD, pMISS), false}, {"DTLB-write-access", unix.PERF_TYPE_HW_CACHE, cache(pDTLB, pWRITE, pACCESS), false}, {"DTLB-write-miss", unix.PERF_TYPE_HW_CACHE, cache(pDTLB, pWRITE, pMISS), false}, {"DTLB-prefetch-access", unix.PERF_TYPE_HW_CACHE, cache(pDTLB, pPREFETCH, pACCESS), false}, {"DTLB-prefetch-miss", unix.PERF_TYPE_HW_CACHE, cache(pDTLB, pPREFETCH, pMISS), false}, {"ITLB-read-access", unix.PERF_TYPE_HW_CACHE, cache(pITLB, pREAD, pACCESS), false}, {"ITLB-read-miss", unix.PERF_TYPE_HW_CACHE, cache(pITLB, pREAD, pMISS), false}, {"ITLB-write-access", unix.PERF_TYPE_HW_CACHE, cache(pITLB, pWRITE, pACCESS), false}, {"ITLB-write-miss", unix.PERF_TYPE_HW_CACHE, cache(pITLB, pWRITE, pMISS), false}, {"ITLB-prefetch-access", unix.PERF_TYPE_HW_CACHE, cache(pITLB, pPREFETCH, pACCESS), false}, {"ITLB-prefetch-miss", unix.PERF_TYPE_HW_CACHE, cache(pITLB, pPREFETCH, pMISS), false}, {"BPU-read-access", unix.PERF_TYPE_HW_CACHE, cache(pBPU, pREAD, pACCESS), false}, {"BPU-read-miss", unix.PERF_TYPE_HW_CACHE, cache(pBPU, pREAD, pMISS), false}, {"BPU-write-access", unix.PERF_TYPE_HW_CACHE, cache(pBPU, pWRITE, pACCESS), false}, {"BPU-write-miss", unix.PERF_TYPE_HW_CACHE, cache(pBPU, pWRITE, pMISS), false}, {"BPU-prefetch-access", unix.PERF_TYPE_HW_CACHE, cache(pBPU, pPREFETCH, pACCESS), false}, {"BPU-prefetch-miss", unix.PERF_TYPE_HW_CACHE, cache(pBPU, pPREFETCH, pMISS), false}, {"NODE-read-access", unix.PERF_TYPE_HW_CACHE, cache(pNODE, pREAD, pACCESS), false}, {"NODE-read-miss", unix.PERF_TYPE_HW_CACHE, cache(pNODE, pREAD, pMISS), false}, {"NODE-write-access", unix.PERF_TYPE_HW_CACHE, cache(pNODE, pWRITE, pACCESS), false}, {"NODE-write-miss", unix.PERF_TYPE_HW_CACHE, cache(pNODE, pWRITE, pMISS), false}, {"NODE-prefetch-access", unix.PERF_TYPE_HW_CACHE, cache(pNODE, pPREFETCH, pACCESS), false}, {"NODE-prefetch-miss", unix.PERF_TYPE_HW_CACHE, cache(pNODE, pPREFETCH, pMISS), false}, }
Functions ¶
func Disable ¶
func Disable(counter string)
Disable a counter by its name, check Counters array for the list
func Enable ¶
func Enable(counter string)
Enable a counter by its name, check Counters array for the list Hardware counters are limited on your CPU (~7 these days). Some performance counters cannot be enabled at the same time. Unsupported counters (either by OS or your CPU) will fail. Some counters can be scheduled at the same PMU on the CPU, so they will be multiplexed. You can check measurement time in the output to see this is the case.
Types ¶
This section is empty.
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